Viewer Questions for Pro OCers
We’re in Taiwan for the next two weeks and we’re planning an “Ask GN” episode with a twist: If you have questions for components manufacturers or professional overclockers, please tweet them @GamersNexus or post a comment on our HW News or Ask GN videos. Opportunities for questions include the more obvious, like manufacturing or factory questions, to more fun, like XOC or overclocking questions for professional overclockers. Let us know what you’d like to hear about!
YouTube Reviewing Its Human Malware Demonetization
“To protect people from misinformation, we’re removing videos that violate our policies, discourage people from seeking medical treatment or encourage the use of harmful cures to treat COVID-19.”
“Given the rapidly updating news and education on COVID-19, we are reviewing our monetization policies around videos that discuss the virus. More to come.”
“Lastly, we are donating advertising space to @WHO and local government authorities in impacted regions to help educate and inform their communities.”
AMD Analyst Day 2020: Zen 3, Zen 4, Navi 2X
AMD just held its AMD Financial Analyst Day, where it outlined several developments on the horizon. There’s a lot of information here, so we’re just going to aggregate and parse it, and we may delve deeper into them separately sometime later. A lot of this is information we’ve seen before, some of it is not.
- AMD has shipped more than 260M x86 Zen cores since the launch of Zen in 2017, and according to AMD, the rate is doubling.
- Zen 3 will begin rollout in late 2020, with the full product stack being available by end of 2021. While we (and everyone else) previously understood Zen 3 to use TSMC’s N7+ process, AMD seems to be walking that back, dropping the “+” designation from its most recent roadmaps. AMD clarified that while Zen 3 will use enhancements beyond vanilla 7nm, it didn’t say Zen 3 won’t use EUV, but that it’ll vary by case.
- As a reminder, TSMC currently has two process nodes beyond its first generation N7. There’s the N7P, which is DUV-based. N7P is mostly an optimized continuation of N7 that recycles the same design rules and tools as N7, so it’s IP-compatible. Then there’s the N7+, which is TSMC’s first process that adapts EUV for certain layers. We’re sure to learn more about this in the future.
- AMD is currently developing Zen 4, targeting a 2022 release. Zen 4 cores will be built on 5nm.
- Epyc Milan, the successor to Epyc Rome, is currently on track for a late 2020 launch. Milan will also use the Zen 3 architecture and use an improved iteratrion of 7nm; whether that’s TSMC’s N7P or N7+ remains to be seen. Further out is Genoa, which we’ve briefly mentioned in AMD’s El Capitan Supercomputer news. Epyc Genoa will be Zen 4-based and built on 5nm for a 2022 release.
- AMD’s Infinity Fabric interconnect is now known as Infinity Architecture, beginning with the 3rd generation of the technology. AMD previously announced that El Capitan will use the 3rd-gen Infinity Architecture, and touts an increased CPU to GPU memory coherency. Other than a rough 2022 release date, not much more is known yet.
- AMD is splitting its GPU architectures: RDNA for client, CDNA for compute/data center. As for how CDNA will differentiate from RDNA-based gaming GPUs remains to be seen. AMD shared a roadmap outlining two generations of CDNA: CDNA 1 at 7nm, and CDNA 2 on an unspecified node for 2022. We know CDNA 2 will rely heavily on the 3rd-gen Infinity Architecture. No doubt, El Capitan is set to use CDNA 2.
- Navi 2x seems to be what AMD is targeting for ‘Big Navi’. Navi 2x as will be based on RDNA 2, and according to AMD RDNA 2 will bring a 50% performance-per-watt improvement; this improvement will extend further with RDNA 3, set for 2022. RDNA 2 based GPUs are expected late 2020.
- AMD also unveiled what appears to be a response to Intel’s Foveros technology, in the form of what AMD calls X3D die stacking. AMD is framing X3D die stacking and packaging as a natural evolution from its past MCM and chiplet designs, seeing AMD stack multip die atop a single interposer. Exactly what dies/elements AMD plans to incorporate here aren’t known. However, AMD is promising a 10x increase/improvement in bandwidth density.
Intel Certifies Costa Rica Site for Test and Finish Operations
In a recent Product Change Notification (PCN), Intel revealed it’s preparing to bring a fourth site for “test and finish” operations online in Costa Rica. The additional site should help ease Intel’s manufacturing woes, and for the meantime, will target Cascade Lake-SP and Cascade Lake-R Xeon chips.
The PCN states that Costa Rica’s operations will roll out in phases, starting April 19 2020. The remaining operations should come online August 3, 2020.
Intel Won’t Regain Process Leadership Until Post 2021
Recently, at the Morgan Stanley’s Analyst Conference, Intel CFO George Davis offered some exceedingly rare introspection on behalf of Intel. Most notably, Davis laid bare that despite the fact that Intel is currently shipping 10nm -- in the form of Ice Lake-Y/U and Agilex FPGAs -- the 10nm node simply won’t be as productive or as profitable as 14nm. And it certainly won’t match the iconic 22nm that spit out Haswell and Ivy Bridge.
“Look, this just isn't going to be the best node that Intel has ever had. It's going to be less productive than 14 [nanometer], less productive than 22 [nanometer] … The fact is, like I said, it isn't going to be as strong a node as people would expect from 14nm or what they'll see in 7nm,” says Davis (via AnandTech transcription).
Davis also affirmed that Intel is firmly behind its manufacturing competitors in terms of process leadership. TSMC is currently at 7nm, moving forward with 7nm+ with EUV. It’s expected that Intel’s 10nm will match TSMC 7nm (non-EUV) in terms of transistor density. When Intel launches its own 7nm EUV-based node by the end of 2021, Davis predicts that only then will Intel reach parity with the competition.
However, Inel isn’t expected to recapture a process lead until some unspecified point beyond 2021.
"So we bring a lot of capability to the table for our customers, in addition to the CPU, and we feel like we're starting to see the acceleration on the process side that we have been talking about to get back to, you know, parity in the 7nm generation and regain leadership in the 5nm [generation],” says Davis.
Intel has not explicitly stated when 5nm would arrive; however, Intel has expressed a desire to get back to a two-year manufacturing cadence, which could land the new node in late 2023. Although, 2024 may be more likely.
Again, AnandTech has a full transcription from the conference.
El Capitan Supercomputer: Genoa & Radeon Instinct
AMD and Cray (now owned by HPE) will partner with Lawrence Livermore National Laboratory to build the El Capitan supercomputer, which is expected to be the world’s fastest supercomputer upon completion in 2023. El Capitan will exceed 2 exaFLOPS of double precision floating point operational power.
El Capitan marks the second exascale level supercomputer that features both AMD CPUs and GPUs -- the first was Frontier. El Capitan will feature AMD’s 4th generation Eypc chips, codenamed “Genoa” and based on Zen 4 cores. Additionally, AMD will provide ‘next generation’ Radeon Instinct GPUs. El Capitan will be based on Cray’s Shasta platform, which is a tried and true platform at the exascale level. El Capitan will also use Cray’s Slingshot interconnect.
Each blade in El Captian will run in a 4:1 configuration, with 4x GPUs connected to 1x CPU, and AMD’s 3rd generation Infinity Architecture (Infinity Fabric is now Infinity Architecture). El Capitan will replace Sierra, and will primarily be used for nuclear weapons modeling.
We’re looking forward to the future NCC-1703-B Constitution class supercomputer.
Ampere Computing Officially Unveils 80-core Altra Server Chip
Last December, we mentioned that Ampere Computing was prepping an 80-core server chip, based on Arm’s N1 architecture. At the time, the chip was codenamed ‘Quicksilver’ and would primarily compete against Amazon’s own home brewed Arm server chip, the Graviton2.
Now, Ampere has officially unwrapped Altra. We don’t have an official list of SKUs or prices, but we know Altra will scale up to 80-cores. All cores will be single-threaded per the N1 architecture, and will be isolated from core sharing security vulnerabilities. Altra is built on TSMC’s N7 process, and is rated for a 3.0GHz all core frequency. Altra will also boast 8 DDR4-3200 memory channels, 128 PCIe 4.0 lanes, and TDPs varying between 45W and 210W, depending on SKUs.
Altra will roll out two reference designs: Mt. Snow and Mt. Jade. Mt. Snow is a single socket configuration, while Mt. Jade is a dual socket. Either design can be had in a 1U or 2U form factor. Additionally, each design will offer support for 16 memory modules per socket and come replete with PCIe 4.0 and CCIX attachments.
Altra is currently being sampled with Ampere’s early customers, and is slated for volume production in mid-2020.
Recent Windows Update Tanking Boot Times
A recent Windows update, specifically, Windows 10 KB4535996, is seeing reports of multiple issues, despite Microsoft having not yet acknowledged any issues. As is often the case, KB4535996 was set to fix bugs, including an especially prevalent known issue where the Search box was not rendering. Alas, Windows updates often cut both ways.
As reported by Windows Latest and several users online, the Sign Tool has been crashing after installing the update. Additionally, Redditors are reporting FPS drops in games as well as audio issues post KB4535996. Some users are also reporting that boot times have tanked, or that their PCs hang in an infinite boot loop.
For now, the best course is to avoid the patch. It’s an optional update, which means it needs to be installed manually. If you’ve installed the update, uninstall it via Settings>Update History>Uninstall Updates.
Seasonic Brings Computex 2018 Concept to Market
Seasonic appears to be bringing its Computex 2018 concept to market, now known as the SSR-750FA Connect. Although the name is different (originally called the System Cable Management Device, or SCMD), the idea remains the same.
The Seasonic Connect essentially trades the modular connections on the PSU itself for a hub, or what Seasonic calls a “backplane.” The hub sits behind the motherboard tray via magnets, and all component-to-PSU connections are made through the hub with shorter modular cables, not much different than cable extensions. The hub is powered and tethered to the PSU via two bundled cables.
The PSU itself is one of Seasonic’s 750W Prime models, carrying an 80 Plus gold certification. Seasonic hasn’t mentioned what the Connect will cost, but did note that time to market is varying, depending on location.
Editorial: Eric Hamilton
Host: Steve Burke
Video: Andrew Coleman, Keegan Gallick